Professor's Workshop with Xilinx, Inc. (Day 1)
- 9:00 am on Wednesday, June 26, 2013
- 5:00 pm on Wednesday, June 26, 2013
- Photonics Center, 8 Saint Mary’s St., Room 115
Boston University’s College of Engineering and Electrical and Computer Engineering Department will host a “Professor’s Workshop” conducted by Xilinx, Inc., arguably the leading developer and manufacturer of Field Programmable Gate Arrays (FPGA). We hope you can attend. The “Professor’s Workshop” is intended to present to a select group of academics, many of whom will travel to Boston University from schools around the country, and possibly other countries, the very latest product(s) and support tools. With this workshop they can expose their students and faculty colleagues to the design and implementation issues of the newest products for use in such applications as advanced embedded systems design. Here are the details - Topics covered: The hardware is a chip called the “Zynq-7000.” It contains a very large FPGA functionality plus two Systems on a Chip (SoC) constructed with Advanced Risc Machine (ARM) Architecture. This chip combines under the Xilinx 28 nm device technology two very compelling and powerful features, two programmable processors and a very powerful programmable architecture. The workshop class will use a development board called the ZED-Board, well configured around the Zynq-7000. The software includes “Vivado High-Level Synthesis (HLS).” Vivado HLS is a key element in the popular Xilinx tool kit, ISE 14.2. Vivado provides simulation and much more efficient compilation resulting in faster, more accurate code for the FPGA. Resources: Attendees will work in pairs at a workstation running Xilinx ISE 14.2 and the connected Development Kit, the Zedboard. The Zedboard contains the Zynq-7000 and all the assorted components and features needed for both instruction and application development. Cost: Nothing, only your time. BU hosts, Xilinx presents, you attend. Where? Boston University’s Photonics Center, home of the Electrical and Computer Engineering Department, at 8 Saint Mary’s Street, Boston, MA 02215. The classes will be held in an instructional lab, room 115. When? The training runs for two full days, Wednesday and Thursday, June 26 and 27. Classes will run from 9 a.m. to 5 p.m. Amenities: Lunch will be served both days along with morning and afternoon snacks. Who should attend? Faculty who teach FPGA implementation should attend. Certainly Post Docs and Research Associates who may wish to exploit a high end FPGA with two ARM processors on board in their work should consider attending. Also anyone involved with students whose project work could use this powerful and unique capability, particularly for something as focused as Senior Projects. Registration Procedure: To register for the workshop, go to: http://www.xilinx.com/university/workshops/workshop-schedule.htm Future benefit: If, after attending the workshop, you would like to get a development kit, such as the Zedboard, that could possibly be arranged through the Xilinx University Support Donation Program.